1. Using virtual addresses
It makes relocation of program is simple since program can be loaded anywhere in memory. In other words, any number of compiled applications can be loaded simultaneously.
2. TLB (translation-lookaside buffer)
In virtual memory system, performance is degraded due to page accesses. To reduce the number of page accesses, we are going to add what is called TLB. A TLB is part of the chip's memory-management unit (MMU), and is simply a hardware cache of popular virtual-to-physical address translations; thus, a better name would be an address-translation cache. Upon each virtual memory reference, the hardware first checks the TLB to see if the desired translation is held therein; if so, the translation is performed without having to consult the page table.
